Generally, a PLL (Phase Locked Loop) modulation circuit requires low cost, low power consumption, good noise characteristics, and modulation accuracy. When modulation is performed in the PLL, it is desirable to widen a frequency bandwidth of the PLL (PLL band) than a frequency bandwidth of a modulation signal (modulation band) in order to improve the modulation accuracy.
However, widening the PLL bandwidth causes degradation in the noise characteristics. Thus, a technique of two-point modulation in which a PLL bandwidth is set at a value narrower than a modulation bandwidth and modulation within a PLL band and modulation without the PLL band are performed at two different points has been devised (for example, see Patent Reference 1).
FIG. 10 is a schematic configuration diagram showing a conventional wide band modulation PLL. As shown in FIG. 10, the conventional wide band modulation PLL includes a PLL having a voltage controlled oscillator (hereinafter VCO) 1 in which an oscillation frequency changes according to a voltage of a control voltage terminal (Vt), a frequency divider 2 for dividing a frequency of an RF modulation signal outputted from the VCO 1, a phase comparator 3 for comparing phases of a reference signal and an output signal of the frequency divider 2 and outputting a signal according to a phase difference and a loop filter 4 for averaging an output signal of the phase comparator, a modulation sensitivity table 7 for outputting a modulation signal based on modulation data, a D/A converter 10 for converting an output signal of the modulation sensitivity table 7 into an analog voltage while adjusting a gain according to a gain control signal from a control part 6, a delta and sigma modulator 9 in which delta and sigma modulation of a signal obtained by adding channel selection information to the output signal from the modulation sensitivity table 7 is performed and the signal is outputted to the frequency divider 2 as a frequency dividing ratio, and an A/D converter 11 for converting a voltage value of Vt into a digital value and outputting the value to the control part 6.
FIG. 11 is a diagram showing a frequency characteristic for description of an action of a wide band modulation PLL. Here, a transfer function of the PLL is set at H(s) (where s=jω). H(s) has a low-pass characteristic as shown in FIG. 11. A low-pass filter of a transfer function H(s) is applied to a modulation signal added to a frequency dividing ratio set in the frequency divider 2. On the other hand, a high-pass filter of a transfer function 1-H(s) as shown in FIG. 11 is applied to a modulation signal added to the control voltage terminal (Vt) of the VCO 1.
Since these two modulation components are added in the control voltage terminal of the VCO 1, the modulation signal is multiplied by a characteristic shown by a broken line of FIG. 11 equivalently, that is, 1 and is given to the VCO 1. As a result of that, an RF modulation signal with a wide band ranging to the outside of a PLL band can be outputted from the VCO 1.
By the way, amplitude of a modulation signal inputted to the control voltage terminal of the VCO 1 is converted into a frequency shift of an RF modulation signal outputted from the VCO 1. The conversion gain is called a modulation sensitivity and generally, a unit of the modulation sensitivity is [Hz/V].
Amplitude of a signal outputted from the D/A converter 10 must match with the modulation sensitivity of the VCO 1. That is because when these matching is not achieved, the transfer function 1-H(s) is multiplied by the amount of deviation (where a times) and a characteristic combined with H(s) shown by a broken line is not flat with respect to the frequency as shown in FIG. 12. This becomes a factor in degrading modulation accuracy.
FIG. 13 is a diagram showing one example of a characteristic representing a change in an output signal frequency versus a control voltage of a general VCO. A modulation sensitivity is represented by a slope of a curve of this characteristic of frequency versus voltage. As shown in FIG. 13, the modulation sensitivity varies depending on an oscillation frequency of the VCO, so that it is necessary to change amplitude of a modulation signal inputted to the control voltage terminal of the VCO according to the oscillation frequency of the VCO in order to obtain the same frequency shift modulation signal at a different oscillation frequency of the VCO.
FIG. 14 is a diagram showing a characteristic of a modulation sensitivity versus an oscillation frequency of a general VCO. It is apparent from the same diagram that the modulation sensitivity changes depending on the oscillation frequency.
Here, one example of the case that it is necessary to change a control voltage resulting from the fact that the modulation sensitivity varies depending on the oscillation frequency of the VCO will be described. It is assumed that a modulation sensitivity at a frequency of 2 GHz of the VCO 1 is 100 MHz/V and the maximum frequency shift of a modulation signal is 5 MHz. In this case, it is necessary to input a signal with the maximum amplitude of 50 mV to Vt. However, it is assumed that a modulation sensitivity becomes 80 MHz/V at the time when a frequency of the VCO 1 is 2.1 GHz. In this case, it is necessary to input a signal with the maximum amplitude of 62.5 mV to Vt. That is, the need to change amplitude of an output signal of the D/A converter 10 by the frequency of the VCO 1 arises.
Incidentally, a modulation sensitivity for a modulation component included in a frequency dividing ratio set in the frequency divider 2 becomes a frequency of a reference signal and does not change with respect to the frequency of the VCO 1. For example, description will be made using the case of assuming that a frequency of the VCO 1 is 2 GHz and a frequency of a reference signal is 1 MHz and the maximum frequency shift of a modulation signal is 5 MHz as an example. In this case, a change range of the maximum frequency dividing ratio becomes 5. Therefore, in this calculation, the frequency of the VCO 1 is irrelevant.
In the case of FIG. 10, by having a characteristic of a modulation sensitivity versus a frequency as the modulation sensitivity table 7 and calculating the amount of variation of a control voltage at the time when a channel frequency changes, the modulation sensitivity is corrected and a gain of the D/A converter is adjusted.
Here, FIG. 15 is one example of a principle diagram of a VCO. The VCO 1 is constructed of an inductor L, a capacitor C, a variable capacitance diode Cv in which capacitance varies depending on a voltage value of a control voltage Vt and an active element 100, and an oscillation frequency fVCO is determined by a mathematical formula 1.
                              f          VCO                =                  1                      2            ⁢            π            ⁢                                          L                ⁡                                  (                                      C                    +                                          C                      v                                                        )                                                                                        〈Mathematical  formula  1〉            
When such a VCO is integrated into an LSI, values of elements such as the inductor L, the capacitor C and the variable capacitance diode Cv vary depending on manufacturing variations. Because of this, characteristics of a modulation sensitivity versus an oscillation frequency of the VCO vary in the respective LSIs.
However, in the conventional wide band modulation PLL, it is necessary to prepare modulation sensitivity tables for characteristics of modulation sensitivities every LSI resulting from variations in the values of these elements. That is, it is necessary to separately measure the tables of the modulation sensitivity versus the frequency every LSI and write and hold the tables into memory etc.
In order to prepare the modulation sensitivity tables, it is necessary to measure the modulation sensitivities versus the frequencies of all the channels used and as a result of that, frequency switching of the PLL is performed by the number of measurement points. Therefore, there were circumstances in which a lot of time is taken and manufacturing cost is increased and also the amount of memory is large and cost of the LSI is also increased.
Further, a modulation sensitivity is corrected when a channel frequency is switched, but there were also circumstances in which variations in the modulation sensitivity because of subsequent environmental variations cannot be corrected and it is difficult to well maintain modulation accuracy.
(Patent Reference 1) U.S. Pat. No. 6,211,747